Description
| SKU | Unavailable |
| ISBN 13 | 9783330330931 |
| ISBN 10 | 3330330937 |
| Title | Signal Integrity In Mother Board – Interconnect Theory and Design |
| Author | Rajeswari Packianathan |
| Condition | Unavailable |
| Binding Type | Paperback |
| Publisher | LAP Lambert Academic Publishing |
| Year published | 2017-06-19 |
| Number of pages | 72 |
| Cover note | Book picture is for illustrative purposes only, actual binding, cover or edition may vary. |
| Note | Unavailable |
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